SDRAM

High-speed Single Data Rate Synchronous DRAMs designed to process data at the same clock speed as the CPU.
All ICs are RoHS compliant.

* Status: P - mass production, S - samples, UD - under development, N - not recommended for new design.

Chip Description Density
(organization) 		Clock
  frequency   		Supply
  voltage  
[V] 		Operating
temperature
[°C] 		   Package    Status *
Automotive Commercial
& Industrial
W9816G6JB
  • density: 16 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -6/-6I/-7
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 2K refresh cycles / 32 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 16 Mbit
(1M x 16, 2 banks)		 166 MHz (-6/-6I)

143 MHz (-7)		 2.7 – 3.6
(-7 speed grades)
3.0 – 3.6
(-6/-6I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 VFBGA-60 N N
W9816G6JH
  • density: 16 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-6/-6I/-7/-7I
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 2K refresh cycles / 32 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 16 Mbit
(1M x 16, 2 banks)		 200 MHz (-5)

166 MHz (-6/-6I)

143 MHz (-7/-7I)		 2.7 – 3.6
(-7/7I speed grades)

3.0 – 3.6
(-5/-6/-6I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-50 N N
W9864G6JB
  • density: 64 Mbit
  • up to 166 MHz clock frequency
  • speed grades: -6/-6I/-7
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 64 Mbit
(4Mx16, 4 banks)		 166 MHz (-6/-6I)

143 MHz (-7)		 2.7 – 3.6
(-7 speed grade)

3.0 – 3.6
(-5/-6/-6I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 VFBGA-60 N N
W9864G6JT
  • density: 64 Mbit
  • up to 166 MHz clock frequency
  • speed grades: -6/-6I/-6A/-6K
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 64 Mbit
(4Mx16, 4 banks)		 166 MHz (-6/-6I) 3.0 – 3.6 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TFBGA-54
8x8 mm		 N N
W9864G6KH
  • density: 64 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-6/-6I/-7
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 64 Mbit
(4Mx16, 4 banks)		 200 MHz (-5)

166 MHz (-6/-6I)

143 MHz (-7)		 2.7 – 3.6
(-7 speed grades)

3.0 – 3.6
(-5/-6/-6I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-54 P P
W9864G6KT
  • density: 64 Mbit
  • up to 166 MHz clock frequency
  • speed grades: -6/-6I/-6J
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), industrial plus (J)
 64 Mbit
(4Mx16, 4 banks)		 166 MHz (-6/-6I/-6J) 3.0 – 3.6 0 – +70
-40 – +85 (I)
-40 – +105 (J)		 TFBGA-54
8x8 mm		 N P
W9864G2JB
  • density: 64 Mbit
  • up to 166 MHz clock frequency
  • speed grades: -6/-6I/-7/-7I
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by DQM0-3
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 64 Mbit
(2Mx32, 4 banks)		 200 MHz (-5)

166 MHz (-6/-6I-6K)

143 MHz (-7/-7I)		 2.7 – 3.6
(-7/-7I speed grades)

3.0 – 3.6
(-6/-6I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TFBGA-90
8x13 mm		 N N
W9864G2JH
  • density: 64 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-6/-6I/-7
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by DQM0-3
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 64 Mbit
(2Mx32, 4 banks)		 200 MHz (-5)

166 MHz (-6/-6I)

143 MHz (-7)		 2.7 – 3.6
(-7 speed grade)

3.0 – 3.6
(-5/-6/-6I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-86 N N
W9812G6JB
  • density: 128 Mbit
  • up to 166 MHz clock frequency
  • speed grades: -6/-6I/-75/-75I
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 128 Mbit
(8Mx16, 4 banks)		 166 MHz (-6/-6I)

133 MHz (-75/-75I)		 3.0 – 3.6 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TFBGA-54
8x8 mm		 N N
W9812G6KH
  • density: 128 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-5I/-6/-6I/-75
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 128 Mbit
(8Mx16, 4 banks)		 200 MHz (-5/-5I)

166 MHz (-6/-6I)

133 MHz (-75)		 3.0 – 3.6 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-54 P P
W9812G6KB
  • density: 128 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-5I/-6/-6I/-6J
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), industrial plus (J)
 128 Mbit
(8Mx16, 4 banks)		 200 MHz (-5/-5I)

166 MHz (-6/-6I)		 3.0 – 3.6 0 – +70
-40 – +85 (I)		 TSOP(II)-54 N P
W9812G2KB
  • density: 128 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-5I/-6/-6I
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I)
 128 Mbit
(4Mx32, 4 banks)		 200 MHz (-5/-5I)

166 MHz (-6/-6I)		 3.0 – 3.6 0 – +70
-40 – +85 (I)
-40 – +105 (J)		 TFBGA-90
8x13 mm		 - P
W9825G6KH
  • density: 256 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-5I/-6/-6I/-6J/-6L/-6A/-6K/-75/75J/75L
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 8K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial ( ,L), industrial (I), industrial plus (J), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 256 Mbit
(16Mx16, 4 banks)		 200 MHz (-5/-5I)

166 MHz (-6/-6I/-6J/-6L/-6A/-6K)

133 MHz (-75/75J/75L)		 3.0 – 3.6 0 – +70 ( ,L)
-40 – +85 (I)
-40 – +105 (J)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-54 P P
W9825G6KB
  • density: 256 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5A/-5K/-6/-6I/-6J/-6A/-6K
  • CAS Latency: 2, 3
  • burst length: 1, 2, 4, 8 and full page
  • burst read, single writes mode
  • Self Refresh current: standard and low power
  • byte data controlled by LDQM, UDQM
  • Power-down Mode
  • 8K refresh cycles / 64 ms
  • interface: LVTTL
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 256 Mbit
(16Mx16, 4 banks)		 200 MHz (-5A/-5K)

166 MHz (-6/-6I/-6J/-6A/-6K)		 3.0 – 3.6 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TFBGA-54 P P




DDR SDRAM

High-speed Double-Data-Rate Synchronous DRAMs which achieve great data speed by transferring data on both the rising and falling edges of the clock signal.
All ICs are RoHS compliant.

* Status: P - mass production, S - samples, UD - under development, N - not recommended for new design.

Chip Description Density
(organization) 		Clock
  frequency   		Supply
  voltage  
[V] 		Operating
temperature
[°C] 		   Package    Status *
Automotive Commercial
& Industrial
W9464G6KH
  • density: 64 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-5I
  • data bandwidth of up to 400 M words per second (DDR-500)
  • differential clock inputs
  • CAS Latency: 2, 2.5, 3
  • burst length: 2, 4, 8
  • Auto Refresh and Self Refresh
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: SSTL_2
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 64 Mbit
(4Mx16, 4 banks)		 200 MHz (-5/-5I)
DDR-400		 2.5±0.2 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-66 P P
W9412G6JB
  • density: 128 Mbit
  • up to 250 MHz clock frequency
  • speed grades: -4/-5/-5I
  • data bandwidth of up to 500 M words per second (DDR-500)
  • differential clock inputs
  • CAS Latency: 2, 2.5, 3
  • burst length: 2, 4, 8
  • Auto Refresh and Self Refresh
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: SSTL_2
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 128 Mbit
(8Mx16, 4 banks)		 250 MHz (-4)
DDR-500

200 MHz (-5/-5I)
DDR-400		 2.4 – 2.7 (-4 speed grade)

2.5±0.2 (-5/-5I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TFBGA-60
8x13 mm		 P N
W9412G6KH
  • density: 128 Mbit
  • up to 200 MHz clock frequency
  • speed grades: -5/-5I/-6I
  • data bandwidth of up to 500 M words per second (DDR-500)
  • differential clock inputs
  • CAS Latency: 2, 2.5, 3
  • burst length: 2, 4, 8
  • Auto Refresh and Self Refresh
  • Power-down Mode
  • 4K refresh cycles / 64 ms
  • interface: SSTL_2
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 128 Mbit
(8Mx16, 4 banks)		 250 MHz (-4)
DDR-500

200 MHz (-5/-5I)
DDR-400

166 MHz (-6I)
DDR-333		 2.5±0.2 (-5/-5I/-6I speed grades) 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-66 P P
W9425G6JB
  • density: 256 Mbit
  • up to 250 MHz clock frequency
  • speed grade: -4/-5/-5I
  • data bandwidth of up to 500 M words per second (DDR-400)
  • differential clock inputs
  • CAS Latency: 2, 2.5, 3
  • burst length: 2, 4, 8
  • Auto Refresh and Self Refresh
  • Power-down Mode
  • 8K refresh cycles / 64 ms
  • interface: SSTL_2
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 256 Mbit
(16Mx16, 4 banks)		 250 MHz (-4)
DDR-500

200 MHz (-5/-5I)
DDR-400		 2.4 – 2.7 (-4 speed grade)

2.5±0.2 (-5/-5I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TFBGA-60 P N
W9425G6KH
  • density: 256 Mbit
  • up to 250 MHz clock frequency
  • speed grades: -4/-5/-5I
  • data bandwidth of up to 500 M words per second (DDR-500)
  • differential clock inputs
  • CAS Latency: 2, 2.5, 3
  • burst length: 2, 4, 8
  • Auto Refresh and Self Refresh
  • Power-down Mode
  • 8K refresh cycles / 64 ms
  • interface: SSTL_2
  • operating temperature range: commercial, industrial (I), automotive (A, K)
  • compliance with AEC-Q100 automotive specification
 256 Mbit
(16Mx16, 4 banks)		 250 MHz (-4)
DDR-500

200 MHz (-5/-5I)
DDR-400		 2.4 – 2.7 (-4 speed grade)

2.5±0.2 (-5/-5I speed grades)		 0 – +70
-40 – +85 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)		 TSOP(II)-66 P P




DDR2 SDRAM

High-speed Double-Data-Rate Synchronous DRAMs generation 2 which achieve greater data speed than DDR SDRAMs by higher clock rate.
All ICs are RoHS compliant.

* Status: P - mass production, S - samples, UD - under development, N - not recommended for new design.

Chip Description Density
(organization) 		Transfer rate
[Mbit/s/pin] 		Supply
  voltage  
[V] 		Operating
temperature
[°C] 		   Package    Status *
Automotive Commercial
& Industrial
W9712G6KB
  • density: 128 Mbit
  • speed grades: -25/-25I/-3
  • transfer rates up to 800 Mb/sec/pin (DDR2-800)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • 4K refresh cycles / 64 ms
  • interface: SSTL_18
  • operating temperature range: commercial, industrial (I), automotive (A, K, W)
  • compliance with AEC-Q100 automotive specification
 128 Mbit
(8Mx16, 4 banks)		 800 (-25/-25I: DDR2-800)
667 (-3: DDR2-667)		 1.8±0.1 0 – +85
-40 – +95 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)
-40 – +115 (W)		 TFBGA-84
(8x12.5 mm)		 P P
W9725G6KB
  • density: 256 Mbit
  • speed grades: -18/-25/-25I/-3
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • 8K refresh cycles / 64 ms
  • interface: SSTL_18
  • operating temperature range: commercial, industrial (I), automotive (A, K, W)
  • compliance with AEC-Q100 automotive specification
 256 Mbit
(16Mx16, 4 banks)		 1066 (-18: DDR2-1066)

800 (-25/-25I: DDR2-800)

667 (-3): DDR2-667)		 1.8±0.1 0 – +85
-40 – +95 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)
-40 – +115 (W)		 WBGA-84
(8x12.5 mm)		 P P
W9725G8KB
  • density: 256 Mbit
  • speed grades: -18/-25/-3
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • 8K refresh cycles / 64 ms
  • interface: SSTL_18
  • operating temperature range: commercial
 256 Mbit
(32Mx8, 4 banks)		 1066 (-18: DDR2-1066)

800 (-25: DDR2-800)

667 (-3: DDR2-667)		 1.8±0.1 0 – +85 WBGA-60
(8x12.5 mm)		 P P
W9751G6NB
  • density: 512 Mbit
  • speed grades: -18/-18I/-25/-25I/-3
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • 8K refresh cycles / 64 ms
  • interface: SSTL_18
  • operating temperature range: commercial (C, L), industrial (I), automotive (A, K, W)
  • compliance with AEC-Q100 automotive specification
 512 Mbit
(32Mx16, 4 banks)		 1066 (-18/-18I: DDR2-1066)

800 (-25/-25I: DDR2-800)

667 (-3: DDR2-667)		 1.8±0.1 0 – +85 ?
-40 – +95 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)
-40 – +115 (W)		 WBGA-84
(8x12.5 mm)		 P P
W9751G8NB
  • density: 512 Mbit
  • speed grades: -18/-18I/-25/-25I/-3
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • 8K refresh cycles / 64 ms
  • interface: SSTL_18
  • operating temperature range: commercial, industrial (I), automotive (A, K, W)
  • compliance with AEC-Q100 automotive specification
 512 Mbit
(64Mx8, 4 banks)		 1066 (-18/-18I: DDR2-1066)

800 (-25/-25I: DDR2-800)

667 (-3: DDR2-667)		 1.8±0.1 0 – +85
-40 – +95 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)
-40 – +115 (W)		 WBGA-60
(8x12.5 mm)		 P P
W971GG6NB
  • density: 1 Gbit
  • speed grades: -18/-18I/-18J/-25/-25I/-25N/-25J/-3
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • interface: SSTL_18
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 1 Gbit
(64Mx16, 8 banks)		 1066 (-18/-18I: DDR2-1066)

800 (-25/-25I/-25N: DDR2-800)

667 (-3: DDR2-667)		 1.8±0.1 0 – +85 (C)
-40 – +95 (I)
-40 – +105 (J)
-40 – +105 (J)

Automotive		 WBGA-84
(8x12.5 mm)		 P P
W971GG8NB
  • density: 1 Gbit
  • speed grades: -18/-25/-25I/-3
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • interface: SSTL_18
  • operating temperature range: commercial, industrial (I), automotive
  • compliance with AEC-Q100 automotive specification
 1 Gbit
(128Mx8, 8 banks)		 1066 (-18: DDR2-1066)

800 (-25/-25I: DDR2-800)

667 (-3: DDR2-667)		 1.8±0.1 0 – +85 (C)
-40 – +95 (I)

Automotive		 WBGA-60
(8x9.5 mm)		 P P
W972GG6KB
  • density: 2 Gbit
  • speed grades: -18/-25/-25I/-3/-3I
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • operating temperature range: commercial, industrial (I), automotive (A, K, W)
  • compliance with AEC-Q100 automotive specification
 2 Gbit
(12Mx16, 8 banks)		 1066 (-18: DDR2-1066)

800 (-25/-25I: DDR2-800)

667 (-3/-3I: DDR2-667)		 1.8±0.1 0 – +85
-40 – +95 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)
-40 – +115 (W)		 WBGA-84
(8x12.5 mm)		 P P
W972GG8KS
  • density: 2 Gbit
  • speed grades: -18/-25/-25I/-3
  • transfer rates up to 1066 Mb/sec/pin (DDR2-1066)
  • CAS Latency: 3, 4, 5, 6, 7
  • burst length: 4 and 8
  • differential clock inputs
  • data masks for write data
  • Auto Refresh and Self Refresh modes
  • Power-down mode
  • interface: SSTL_18
  • operating temperature range: commercial, industrial (I), automotive (A, K, W)
  • compliance with AEC-Q100 automotive specification
 2 Gbit
(256Mx8, 8 banks)		 1066 (-18: DDR2-1066)

800 (-25/-25I: DDR2-800)

667 (-3: DDR2-667)		 1.8±0.1 0 – +85
-40 – +95 (I)

Automotive:
-40 – +85 (A)
-40 – +105 (K)
-40 – +115 (W)		 WBGA-60
(8x9.5 mm)		 P P




DDR3 SDRAM

High-speed Double-Data-Rate Synchronous DRAMs generation 3 which achieve greater data speed than DDR2 SDRAMs by higher clock rate.
All ICs are RoHS compliant.

* Status: P - mass production, S - samples, UD - under development, N - not recommended for new design.

Chip Description Density
(organization) 		Transfer rate
[Mbit/s/pin] 		Supply
  voltage  
[V] 		Operating
temperature
[°C] 		   Package    Status *
Automotive Commercial
& Industrial
W631GG6NB
  • density: 1 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J/-15/-15I/-15J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 1 Gbit
(64Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.5±0.075 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-96
(7.5x13 mm)		 P P
W631GG8NB 1 Gbit
(128Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.5±0.075 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-78
(8x10.5 mm)		 P P
W631GU6NB
  • density: 1 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J/-15/-15I/-15J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 1 Gbit
(64Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-96
(7.5x13 mm)		 P P
W631GU8NB 1 Gbit
(128Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-78
(8x10.5 mm)		 P P
W632GG6NB
  • density: 2 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J/-15/-15I/-15J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 2 Gbit
(128Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.5±0.075 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-96
(7.5x13 mm)		 P P
W632GG8NB 2 Gbit
(256Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.5±0.075 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-78
(8x10.5 mm)		 P P
W632GU6NB
  • density: 2 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J/-15/-15I/-15J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 2 Gbit
(128Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-96
(7.5x13 mm)		 P P
W632GU8NB 2 Gbit
(256Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-78
(8x10.5 mm)		 P P
W632GU6QB
  • density: 2 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J)
 2 Gbit
(128Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)		 VFBGA-96
(7.5x13 mm)		 - P
W632GU8QB 2 Gbit
(256Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)		 VFBGA-78
(8x10.5 mm)		 - P
W634GG6NB
  • density: 4 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J/-15/-15I/-15J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 4 Gbit
(256Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.5±0.075 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-96
(9x13 mm)		 P P
W634GG8NB 4 Gbit
(512Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.5±0.075 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-78
(8x10.5 mm)		 P P
W634GU6NB
  • density: 4 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J/-15/-15I/-15J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 4 Gbit
(256Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-96
(9x13 mm)		 P P
W634GU8NB 4 Gbit
(512Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)

1333 (-15/15I/-15J: DDR3-1333)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-78
(8x10.5 mm)		 P P
W634GU6QB
  • density: 4 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J)
 4 Gbit
(256Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)		 VFBGA-96
(9x13 mm)		 - P
W634GU8QB 4 Gbit
(512Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)		 VFBGA-78
(8x10.5 mm)		 - P
W634GU6RB
  • density: 4 Gbit
  • speed grades: -09/-09I/-09J/-11/-11I/-11J/-12/-12I/-12J
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I), industrial plus (J), automotive
  • compliance with AEC-Q100 automotive specification
 4 Gbit
(256Mx16, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-96
(9x13 mm)		 S P
W634GU8RB 4 Gbit
(512Mx8, 8 banks)		 2133 (-9/-9I/-9J: DDR3-2133)

1866 (-11/-11I/-11J: DDR3-1866)

1600 (-12/-12I/-12J: DDR3-1600)		 1.283 – 1.45 0 – +95
-40 – +95 (I)
-40 – +105 (J)

Automotive		 VFBGA-78
(8x10.5 mm)		 S P
W638GU6QB
  • density: 8 Gbit
  • speed grades: -09/-09I/-11/-11I/-12/-12I
  • transfer rates up to 2133 Mb/sec/pin (DDR3-2133)
  • CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13, 14
  • programmable read burst ordering: interleaved or sequential
  • burst length: 8 (fixed order), 4 (switched order)
  • differential clock inputs
  • data masks for write data
  • Refresh, Auto Refresh, Self Refresh and Partial Array Self Refresh modes
  • Power-down mode
  • interface: SSTL_15
  • operating temperature range: commercial, industrial (I)
 8 Gbit
(512Mx16, 8 banks)		 2133 (-9/-9I: DDR3-2133)

1866 (-11/-11I: DDR3-1866)

1600 (-12/-12I: DDR3-1600)		 1.283 – 1.45 0 – +95
-40 – +95 (I)		 VFBGA-96
(9x13 mm)		 N P




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