An improved version of the Pseudo SRAM memories, consisting of a DRAM macro core with a traditional asynchronous SRAM interface, characterized by higher speed and smaller form factor size.
* Status: P - mass production, S - samples, UD - under development, N - not recommended for new design.
Chip |
Description |
Density (organization)
|
Clock frequency
|
Access time [ns]
|
Supply voltage [V]
|
Operating temperature [°C]
|
Package
|
Status *
|
Automotive |
Commercial & Industrial |
W955K8MBY
(731 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I), automotive
|
32 Mbit (4Mx8) |
200 MHz |
35 |
1.8 (VCC, VCCQ) |
-40 – +85 (I)
Automotive |
TFBGA-24 (6x8 mm) |
P |
P | |
W955N8MBY
(730 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I), automotive
|
32 Mbit (4Mx8) |
200 MHz |
35 |
3.0 (VCC, VCCQ) |
-40 – +85 (I)
Automotive |
TFBGA-24 (6x8 mm) |
N |
N | |
W956D8MWS
(733 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I)
|
64 Mbit (8Mx8) |
200 MHz |
35 |
1.8 (VCC, VCCQ) |
-40 – +85 (I) |
TFBGA-24 (6x8 mm) |
- |
P | |
W956D8MBY
(776 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I), automotive
|
64 Mbit (8Mx8) |
200 MHz |
35 |
1.8 (VCC, VCCQ) |
-40 – +85 (I)
Automotive |
TFBGA-24 (6x8 mm) |
P |
P | |
W956A8MBY
(776 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I), automotive
|
64 Mbit (8Mx8) |
200 MHz |
35 |
3.0 (VCC, VCCQ) |
-40 – +85 (I)
Automotive |
TFBGA-24 (6x8 mm) |
N |
N | |
W957D8MFY
(662 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- operating temperature ranges: industrial (I), automotive
|
128 Mbit (16Mx8) |
200 MHz | |
1.8 (VCC, VCCQ) |
-40 – +85 (I)
Automotive |
BGA-24 |
P |
P | |
W957D8NWS
(810 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- operating temperature ranges: industrial (I)
|
128 Mbit (16Mx8) |
200 / 250 MHz | |
1.8 – 1.35 (VCC, VCCQ) |
-40 – +85 (I) |
WLCSP |
- |
P | |
W957D6NBG |
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 16-bit data bus
- operating temperature ranges: industrial (I)
|
128 Mbit (8Mx16) |
200 / 250 MHz | |
1.8 – 1.35 (VCC, VCCQ) |
-40 – +85 (I) |
BGA-49 |
- |
P |
W958D8NBY
(769 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I), automotive
|
256 Mbit (32Mx8) |
200 / 250 MHz |
28 |
1.8 (VCC, VCCQ) |
-40 – +85 (I)
Automotive |
TFBGA-24 (6x8 mm) |
P |
P | |
W958D8NWS
(765 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I)
|
256 Mbit (32Mx8) |
200 MHz |
35 |
1.8 (VCC, VCCQ) |
-40 – +85 (I) |
WLCSP-30 |
- |
P | |
W958D6NWS
(826 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 16-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I)
|
256 Mbit (16Mx16) |
200 MHz |
35 |
1.8 (VCC, VCCQ) |
-40 – +85 (I) |
WLCSP-30 |
- |
P | |
W958D6NBK
(829 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 16-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I)
|
256 Mbit (16Mx16) |
200 / 250 MHz |
28 |
1.8 (VCC, VCCQ) |
-40 – +85 (I) |
WFBGA-49 |
- |
P | |
W959D8NFY
(733 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 8-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I), automotive
|
512 Mbit (64Mx8) |
200 / 250 MHz |
28 |
1.8 (VCC, VCCQ) |
-40 – +85 (I)
Automotive |
TFBGA-24 (6x8 mm) DDP (Dual-Die-Package) |
P |
P | |
W959D6NFK
(773 KB)
- HyperBus interface - low signal count, Double Data Rate (DDR)
- 16-bit data bus
- high speed read and write operations
- differential clock
- hardware Reset
- Read-Write Data Strobe (RWDS)
- burst operations - burst lengths 16/32/64/128 bytes
- hybrid sleep and deep power-down modes
- full and partial array refresh modes
- small package
- operating temperature ranges: industrial (I)
|
512 Mbit (32Mx16) |
200 / 250 MHz |
28 |
1.8 (VCC, VCCQ) |
-40 – +85 (I) |
WFBGA-49 DDP (Dual-Die-Package) |
- |
P | |